Introduction:Even though FLASH memory is a well-established memory technology, continuous advances, such as multi-level cell (MLC), are aimed at achieving increased density. New measurement techniques and capabilities are also becoming available, from characterizing a single transistor for development purposes to integrated and automated solutions for FLASH production.
During this webinar, fundamentals of FLASH technology testing will be reviewed, incorporating a discussion of FN (Fowler-Nordheim) and (HEI) (Hot Electron Injection) programming and erasing. Different aspects of testing applicable to single FLASH transistors and FLASH array testing will be considered, including standard transistor characterization, endurance, and disturb testing. The pulse fidelity requirement for MLC testing will also be discussed. These applications will be demonstrated via Keithley's new Ultra Fast I-V test solution, which offers better control of the pulse shape and amplitude, and, as a result, is well-suited for MLC FLASH testing, and also Keithley's ACS software, which manages a range of testing scenarios.
Target Audience
This webinar will be beneficial for people with established FLASH test setups, as well as those looking for a test solution.

Introduction:Phase Change Memory, a type of non-volatile computer memory also known as PRAM, PCM, and PCRAM, is a new and promising technology. PRAM uses the unique behavior of chalcogenide glass, which can be switched between two states, crystalline and amorphous, with the application of heat. Recent versions can achieve two additional distinct states, effectively doubling its storage capacity.
This webinar will provide basic information on the physics and operation of PRAM memory elements. Common characterization and measurement techniques will be described and compared, including the R-Load method and a technique using Keithley抯 ultra-fast IV unit.
Target Audience:
This seminar is recommended primarily for test engineers and test engineering managers who are new to making PRAM measurements, but it will be useful for the experienced user, as well.

Introduction:There are many misconceptions around Fractional N PLLs. One of them is that they require different design equations and simulation techniques that are used for integer N PLLs. In fact, they use the same concepts and equations. The difference, though, is the performance. By having smaller N value, Fractional N PLLs theoretically have better phase noise performance. Although Fractional N PLLs contain compensation circuitry for the fractional spurs, typically it is still a net improvement. This webinar will address some of the misunderstanding of fractional N PLLs, introduce the advantages and disadvantages of fractional N PLLs over integer N PLLs, fractional N PLL design consideration as well as design tricks.

Introduction:Designers for data acquisition systems are always facing new challenges from complex noise sources inside and outside of the systems. A lot of time and efforts have to be spent on removing the noise captured from various components of the data acquisition process: Operational Amplifiers, Analog to Digital Converters, Power lines and Digital Communication Interface and so on. In this webinar, we would like to share the techniques and solutions with design engineers on how to improve noise rejection, especially the EMI from the working environment of devices, e.g. Cell phone Signal, UHF, VHF…etc. We will also discuss from concept to real application our EMI rejection solution and how this solution simplifies data acquisition system designs.