High Voltage Wafer Level Test - Tips, Tricks, and Pitfalls

Webinar Introduction

In this seminar, we will identify, discuss, and propose solutions for a number of challenges related to high voltage wafer level parametric test. Some key areas include:
• High voltage probe card requirements
• The risks of hot switching and cable charging
• Protecting low voltage instruments during high voltage testing
• High voltage parametric test roadmap

Target Audience:
This webinar is intended for test department engineers and managers in the semiconductor industry that are interested in learning more about the practical issues related to high voltage parametric test and characterization in a production environment.

Presenter

Paul Meyer - Senior Staff Technologist
Paul Meyer is Senior Staff Technologist for Keithley Instruments' Semiconductor Measurements Group, based in Cleveland, Ohio. Prior to joining Keithley, Paul's career included designing semiconductor fab equipment, as well as equipment and equipment engineering in semiconductor fabs.

Company Introduction

Keithley Instruments, Inc. designs, develops, manufactures and markets complex electronic instruments and systems geared to the specialized needs of electronics manufacturers for high-performance production testing, process monitoring, product development and research. The Company has approximately 500 products used to source, measure, connect, control or communicate direct current (DC), radio frequency (RF) or optical signals. Product offerings include integrated systems solutions, along with instruments and personal computer (PC) plug-in boards that can be used as system components or stand-alone solutions. The Company's customers are engineers, technicians and scientists in manufacturing, product development and research functions. For more information, visit wwww.keithley.com.

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