Designer for Data acquisition system is always facing new challenge from complexity of the noise sources inside and outside of the system. Engineers spend time on removing the noise that capture from the devices on the Data acquisition system, such as Operational Amplifiers, Analog to Digital Converters, Power lines and Digital Communication Interface. We would like to share the techniques and possible solutions with engineers for how to make the design easier to improve the noise rejection, especially on the EMI from environment, e.g. Cell phone Signal, UHF, VHF¡­etc. On this Webinar, we will discuss from concept to real applications on our EMI rejection solution, this is just the beginning of our ¡¡ãEase of Use¡¡À solutions from National Semiconductor.

Advanced OFDM (Orthogonal Frequency Division Multiplex) technologies impose additional challenges and requirements for testing new wireless communication devices and systems. This paper compares and contrasts traditional single-carrier modulation schemes with multi-carrier OFDM schemes to understand the test equipment and measurement considerations when using modern vector signal generators and analyzers. It covers in detail spectrum, power, and modulation quality measurements and techniques for R&D and high-speed production test applications. The paper covers testing of both SISO (single-input, single-output) and MIMO (multiple-input, multiple-output) communications systems used in 802.11n WLAN, 802.16e mobile-WiMAX Wave 2, which are also applicable to future LTE and UMB cellular standards.

In the past, FPGAs were typically low density and low performance—used primarily as "glue" logic to piece together a system. Today, FPGAs are high density, high performance components—used to implement major system functionality. Since the current trend is to use multiple FPGAs on a PCB, how do you effectively and efficiently integrate the two? New FPGA/PCB concurrent design processes and tools significantly improve system performance, product costs, and designer productivity. This session will discuss these new design approaches.

Decompensated amplifier is a unique type of amplifiers that provides higher bandwidth and faster slew rate. It has a minimum gain requirement. If you use the decompensated amplifier below the minimum gain stated on the datasheet, the amplifier becomes unstable. However, this limitation will not limit your design! It has many advantages if it is used correctly specially for high gain applications where the ratio of overall bandwidth to supply current is important! Other applications that would benefit from Decompensated Amplifiers are High Speed ADC Interface, Medical Systems, and Wide Band Communications. In this seminar, we will discuss the internal circuitry and why we can get higher bandwidth and faster slew rates with less supply current, its application, and compensation techniques when using decompensated amplifiers.

Backplanes are extensively used in many applications where signals from one module are exchanged with other module(s) within the system. Although the structure of backplanes is simple, there are many system design tricks hidden behind, especially when the data rate is high. This presentation will address most of the design challenges and explain how signal conditioning devices are able to ease the problems.

Local oscillators can be found in many segments, such as wireless infrastructure, tuner and ADC/DAC clock, etc. Most of the applications required that the local oscillator must be tunable. Therefore, in this seminar, we will focus on VCO, voltage control oscillator. Since the frequency of a VCO will drift without control, a phase lock loop is introduced to lock the VCO to the desired frequency. Hence, when we talk about local oscillators, we are referring to the whole PLL+VCO system design.
In this seminar, we will also see how the key design parameters, such as charge pump current, N-counter value and phase comparison frequency, etc affect the overall system performance like loop bandwidth, phase margin, lock time and spurs.

As more and more features are added to applications, powering different blocks and yet achieving efficiency is a complex issue. Helping engineers to address this complex issue is one of National Semiconductor's power management technology development objectives. In this session, we will take the example of switchers and explain how these advanced switchers can simplify design work. These switchers have wide input voltage range so they can be applied to different applications. They also require less external components. What's more, many of these switchers do not require compensation or are already with internal compensation. Together with our Webench online design tool and excel tool, which simplify the design task, we are making engineers' lives easier.

Today, as data conversion sampling rates of analog-to-digital converters move into the Giga Samples Per Second (GSPS) range, data conversion systems must be designed to support such high conversion rates. Furthermore, only those analog components that can generate and amplify high-frequency signals should be used. Are you facing these and other challenges when you design GHz sampling systems? Join this webinar to get answers to your design questions.

There are many applications that combine the use of Operational Amplifiers and ADCs. However, how to choose the right Amplifier and ADC combination in order to maximize performance? What does the Bandwidth of the Amplifier has to do with the ADC's output error? What do you need to know about Aliasing? You can get all these answers by joining our Online Seminar!

This webinar discusses some of the latest trends of DisplayPort, the new VESA-approved digital interface standard, and its adoption in monitor, consumer electronics products, workstation products and portable computers. With its ability to double the DVI bandwidth in a smaller connector suited for portable applications, DisplayPort is set to take the industry by storm with its royalty-free implementation, replacing DVI and VGA in future version of Notebook and Desktop PCs, whilst supporting HDCP in next generation of optical media DRM.
 We are honored to announce that the lucky draw winner is Francis Joseppee Pascual from Dell

In this web seminar, you will learn how Rambus' leadership XDR™memory architecture addresses the needs of DTV semiconductor and systems designers with superior performance, efficiency, and scalability while lowering overall BOM and enabling faster time-to-market. Supported by three of the top five DRAM vendors, this superior differential technology with patented innovations such as FlexPhase™and Dynamic Point-to-Point topology, allows unprecedented speeds up to 8GHz using a single DRAM device.