Description: A source measurement unit (SMU) instrument can boost productivity, deliver more complete characterization, and increase overall test system performance. However, to truly optimize your testing, it's imperative to look beyond the "banner specs" when selecting the right SMU for your application. This web seminar will explain the basics of how SMU instruments work, describe key features and capabilities to consider for selecting an SMU instrument, and compare the actual performance of different SMU instruments in "real-world" applications. Target Audience: The material presented in this web seminar will be of value to engineers, researchers, educators, and students characterizing and testing semiconductor-based devices, components, materials, and technologies with current vs. voltage (I /V) characteristics that need to be verified and/or better understood. Typical devices and technologies include traditional silicon, compound semiconductor (for example, SiC, GaN) for power/energy applications like HBLEDs and solar cells, electronic components, nanotechnology, and emerging technologies such as graphene.

Description: This seminar is focused on examining the benefits and tradeoffs associated with parallel test solutions for wafer level reliability (WLR.) WLR tests are commonly used throughout the semiconductor lifecycle from technology development and process integration to process reliability monitoring. The speed and accuracy of the WLR testing impact time to market for new designs. Parallel WLR testing provides a tool to significantly accelerate throughput by providing statistically significant samples sooner. Parallel WLR test solutions provide throughput benefits for both traditional and advanced WLR measurements. By participating in this seminar, you will learn and understand: How to estimate the speed and throughput impact of parallel WLR testing on traditional reliability structures; How to assess traditional test structures for use in a parallel test system; The source of measurement errors that impact WLR measurements; Typical configuration, measurement, and optimization techniques.
Target Audience: This seminar is recommended for engineers who are new to semiconductor reliability testing, test engineers who need to accelerate WLR testing, and QRA lab managers.

Description: The search to replace FG NAND and fast development of alternate non-volatile memory (NVM) technologies, such as Phase-Change memory (PCM/PRAM), Ferro-electric memory (FeRAM), Magnetoresistive memory (MRAM), and Resitive memory (ReRAM) is currently underway. Advanced characterization capabilities are critical for success of any new technology. Despite a significant variety in memory technologies, all of them share the need for the same type of characterization, such as transient switching behavior, endurance, and the need for dynamic current measurement. Non-Volatile Memory - Characterization and Measurement Techniques will discuss and provide examples on the common characterization and measurement techniques for various NVM technologies, including FLASH, PRAM, ReRAM, and FeRAM. This webinar will also provide an overview of improvements in standard instrumentation that provide pulse source and measurement with a single instrument that measures the current and voltage simultaneously while applying multi-pulse waveforms to a memory device or material.
Target Audience: This seminar is recommended primarily for NVM test engineers, researchers, and test engineering managers, but it will be useful for any engineer or researcher/student in the NVM field.

Description: Thyristors and Triacs are widely used by White Goods applications and in designs that required AC loads. This webinar will touch on the basics and family of Thryistors and Triacs and explain the leading advantage that NXP has in the Thyristor technologies. It will also enable you to understand what causes false triggering and highlight the benefits of using 3 Quadrant Triacs as well as the advantages of replacing mechanical relays with Triacs.

Description: Switching Mode Power Supply(SMPS)is a popular topology used in most of the power supply designs. This webinar explores some of the NXP discrete products which could be used in SMPS for various functions, from low to high power requirements. It explains power efficiency features in some of NXP devices which will be very helpful in improving power efficiency of SMPS design.
It is explained in this presentation how innovation in packaging and IC designs used by NXP could produce products which could help power supply designer to reduce loss and heat dissipation in their application.

Description: In this seminar, we will identify, discuss, and propose solutions for a number of challenges related to high voltage wafer level parametric test. Some key areas include: • High voltage probe card requirements • The risks of hot switching and cable charging • Protecting low voltage instruments during high voltage testing • High voltage parametric test roadmap
Target Audience: This webinar is intended for test department engineers and managers in the semiconductor industry that are interested in learning more about the practical issues related to high voltage parametric test and characterization in a production environment.